关于jitter的专业文章
摘抄一些：Audio Engineering Society
Convention Paper
Presented at the 117th Convention
2004 October 28–31 San Francisco, CA, USA
Specifying the Jitter Performance
of Audio Components
ABSTRACT
The question of sample-clock quality is a perennial one for digital audio equipment designers. Yet most chip makers
provide very little information about the jitter performance of their products. Consequently, equipment designers
sometimes get burnt by jitter issues. The increasing use of packet-based communications and class-D amplification
will throw these matters into sharp relief. This paper reviews various ways of characterizing and quantifying jitter,
and refines several of them for audio purposes. It also attempts to present a common, unambiguous terminology.
The focus includes wideband jitter, baseband jitter, jitter spectra, period jitter, long-term jitter and jitter signatures.
Comments are made on jitter transfer through phase-locked loops and on the jitter susceptibility of audio converters.
1 INTRODUCTION
Clocks tick at the heart of every digital audio product.
Jitter on clocks that are applied to audio converters
(analog-to-digital and digital-to-analog) can degrade
audio performance. To make sense of this situation,
designers need a framework for thinking about jitter.
To make progress, the industry needs some good ways
of characterizing and quantifying jitter performance.
It also needs a common terminology. This paper aims
to contribute in all of these areas.
At the time of writing, a new project has been proposed
to the AES Standards Committee with the short title
'Jitter Performance Specification'. It is likely to be
allocated to AES SC-02-01, the Working Group on
Digital Audio Measurements. The authors encourage
all interested parties to participate in this project.
Details can be found at <www.aes.org/standards>.
The authors also invite feedback on the present paper
by direct email.
2 OVERVIEW
The emphasis in this paper is on audio sample clocks
and on the clocking chains from which they are derived.
It is not on interface-specific aspects of jitter.
We have chosen to focus at this stage on components
(e.g. chips) rather than equipment (e.g. mixing desks).
Progress with the former will hopefully spawn progress
with the latter in due course.
There is considerable disagreement in the industry on
how low jitter must be for its effects to be inaudible
. Some of this may be due to the inappropriate
use of period jitter as a measure of sample clock quality
(section 3.5.1). Further research is needed in this area.
The authors hope that the present paper is entirely
complementary to work on audibility aspects.
Currently, there is little in place that helps designers to
predict their jitter-related performance degradation.
This is a problem. For example, the use of conventional
phase-locked-loop techniques to lock to timestamps in
packet-based audio interfaces can easily produce clocks
that are too jittery for use in professional products .
Technologies are available that solve the problem, but
unless designers know early-on that they must use them,
redesign may be required. An aim of this paper is to
help designers avoid such uncertainty and expense.
The core of this paper is section 3, which looks at ways
of characterizing and quantifying jitter. It refines the
wideband and long-term jitter measures for audio use,
and introduces a new measure called baseband jitter.
It sets out some guidelines for plotting jitter spectra, and
unifies the frequency-domain and time-domain views
through plots that the authors refer to as jitter signatures.
Numeric examples are included to keep things concrete.
Section 4 covers clocking chains and jitter transfer.
Section 5 presents a unified qualitative treatment of the
jitter susceptibility of audio converters, discussing four
distinct aspects. The paper's key points are reiterated in
section 6. An appendix explores reasons for preferring
jitter spectra (s/rtHz) to phase noise spectra (dBc/rtHz),
and illustrates the effect of clock division.
3 CLOCK JITTER
3.1 What is jitter?
3.1.1 One definition
The following general definition of jitter may be useful:
Box 1. A general definition of jitter 1.
This definition has been adapted from the one in .
The latter uses the expression "short-term", implicitly
defining it as referring to modulation frequencies
"greater than or equal to 10 Hz". This seems awkward,
and is at odds with the expression "long-term jitter",
which has found use in various circles. Additionally,
the definition in limits its scope to "timing signals".
Our adapted definition sidesteps these problems.
Modulation components below 10 Hz comprise wander
rather than jitter. Some specs say the demarcation point
can actually depend on context. At-least one standard
states that the cutoff "is usually specified at 1 Hz" .
These contradictions are not a problem in practice, but
they do underline the need to be clear about bandwidths
when using highpass and bandpass measures of jitter.
....
4 JITTER TRANSFER
A clean-and-simple clocking arrangement might have
a free-running crystal oscillator connected directly to
local ADCs and DAC chips. But such arrangements are
not very common. Even in DVD players for example,
the audio clocks come via a PLL (phase-locked loop),
locked to 27 MHz. And in digitally connected systems,
downstream devices commonly slave their audio clocks
either to an incoming audio stream or to a nominated
sync master. Every stage in the clocking chain can
potentially contribute jitter to the derived audio clocks.
In section 3.2 we looked at the intrinsic jitter of PLLs,
but that is only one aspect of PLL performance.
Another important aspect is jitter transfer, i.e. how jitter
on the PLL's reference input affects its clock output.
Information on clocking chips' jitter transfer behavior
allows equipment designers to calculate the effect of
earlier stages on derived audio clocks. But chip makers
do not always provide the necessary information.
PLLs can conveniently be thought of as jitter filters.
Within their loop bandwidth they track their reference,
but beyond it they increasingly attenuate reference jitter.
Figure 9 shows this diagrammatically.
Figure 9. PLL jitter transfer function.
Pertinent characteristics include corner frequency,
roll-off rate and in-band response peaking. The authors
see no strong need to formalize how such information
might be expressed. It may suffice, in a given context,
to simply state the minimum attenuation at and above a
particular frequency. In some cases the lockup time is
also of interest.
Jitter transfer is predominantly a linear phenomenon,
but nonlinear effects can arise, particularly at low levels.
When measuring jitter transfer, methods that are blind
to nonlinear effects should be avoided.
5 JITTER SUSCEPTIBILITY
5.1 General points
Audio ADCs and DACs have three important inputs;
the signal input, the voltage reference, and the clock.
Noise and interference on the voltage reference causes
amplitude modulation, and jitter on the clock causes
phase modulation. The resulting modulation products
look very similar in the frequency domain. One of the
authors once spent several days trying to track down a
low-frequency jitter problem, only to find that it was
in fact a problem of LF noise on the voltage reference.
Our emphasis here is on the phase-modulation aspect.
Phase modulation of a sinusoidal signal produces
sidebands at fsignal ± fjitter. Only modulation products
that fall into the audio band are a direct problem.
Subjecting an audio signal to 1MHz jitter, does not give
audioband products. The frequency pairings that do
are the straight one-to-one matches plus a 20 kHz slop.
A key point is that it is not just the basic audio signal
that gets modulated. It is everything that crosses the
boundary between the continuous-time domain and
sampled-signal domain. This can include out-of-band
interference (in ADCs), incompletely attenuated images
(in DACs), and "zero-input" internal signals such as
shaped quantization noise and class-D carriers.
In common ADC and DAC chips, the domain boundary
is right at the pins of the chip. You can get an idea of
which frequency regions might be problematic by
considering the spectrum of the pin signal. You should
mentally apply a 6dB/octave tilt to this, to accommodate
the fact that jitter sidebands scale with signal slew rate.
(Again, log axes help.) Even low-level components can
cause problems if they are up at high frequencies.
The other thing to consider is the spectrum of the jitter.
As we saw in section 3.2, this is typically far from flat.
Often it will have a broad peak. The worst case is if
this peak happens to overlap a dominant region of the
tilted total signal spectrum.
Converters are sensitive to jitter in different ways and
to different degrees . The people who are best
placed to find concise ways of spec'ing these things are
perhaps the chip makers themselves. The authors note
that for DACs and class-D amplifiers, simple plots of
output signal spectrum up to 1 MHz or more can be
very helpful to equipment designers. The chip makers
should also consider specifying how low the clock jitter
needs to be for "normal operation" of their converters.
This could be done by stating a limit of acceptability for
the smoothed jitter-spectral-density over a key band.
Alternatively a limit on the interval jitter for some
specified interval might do the job.
A selective summary of jitter susceptibility issues
is presented in table 3. The four remaining parts of
this section will each discuss one column of table 3.
Incidentally, table 3 deliberately omits some circuits,
including single-bit DACs, upsampling DACs that don't
use noise shaping, converters that incorporate
asynchronous sample-rate conversion, and analog
class-D amplifiers.
5.2 Reduction of dynamic range
Jitter bites equipment designers most deeply when it
causes a converter that should have more than 100 dB of
dynamic range to deliver e.g. only 80 dB. In such cases
the jitter is interacting not with the audio signal but with
an internal signal such as shaped quantization noise.
Early one-bit DACs were particularly sensitive to this.
More-recently the inclusion of switched-capacitor filters
and the move to multi-bit designs has eased things.
Above ~200 kHz, the quantization noise is largely white
at its point of injection. When you factor in the DAC's
sin(x)/x frequency response and the effect of the internal
switched-capacitor filter stage, its spectrum becomes
more like the upper trace in figure 10 (taken from ).
By applying the already-mentioned 6dB/octave tilt,
one can estimate the region of greatest jitter sensitivity.
It is typically somewhere around ~0.5 or ~1 MHz for
DACs that use high-order noise shaping.
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